Integrated circuit packaging technology has seen an increase in the number of integrated circuits mounted on a single circuit board or substrate. The new packaging designs are more compact in form factors, such as the physical size and shape of an integrated circuit, and providing a significant increase in overall integrated circuit density. However, integrated circuit density continues to be limited by the “real estate” available for mounting individual integrated circuits on a substrate. Even larger form factor systems, such as personal computers, compute servers, and storage servers, need more integrated circuits in the same or smaller “real estate”. Particularly acute, the needs for portable personal electronics, such as cell phones, digital cameras, music players, personal digital assistants, and location-based devices, have further driven the need for integrated circuit density.
This increased integrated circuit density has led to the development of multi-chip packages, a package in package (PIP), a package on package (POP), or a combination thereof in which more than one integrated circuit can be packaged. Each package provides mechanical support for the individual integrated circuits and one or more layers of interconnect lines that enable the integrated circuits to be connected electrically to surrounding circuitry. Current multi-chip packages, also commonly referred to as multi-chip modules, typically consist of a substrate onto which a set of separate integrated circuit components are attached. Such multi-chip packages have been found to increase integrated circuit density and miniaturization, improve signal propagation speed, reduce overall integrated circuit size and weight, improve performance, and lower costs all of which are primary goals of the computer industry.
Multi-chip packages with stacking configurations, or PIP, may also present problems. Spacer structures may be used to create space for electrical connections in the stacked structure. Package structures contain packaged integrated circuits in the stacked structures. Typical spacer structures and the encapsulation material of the packaged integrated circuits have low adhesion and become a source of delamination. Conventional spacer and packaged integrated circuits interface perform poorly in reliability test from the delamination at this interface.
Thus, a need still remains for an integrated circuit package system providing low cost manufacturing, improved yield, and thinner height for the integrated circuits. In view of the ever-increasing need to save costs and improve efficiencies, it is more and more critical that answers be found to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.